The invention relates to a circuit arrangement for converting an input AC voltage into a rectified output voltage with a rectifier circuit and a charging capacitor downstream in the circuit arrangement.
Such circuit arrangements are used, inter alia, in power supplies for supplying power to any apparatus such as, for example, television sets, monitors, settop boxes or the like. The input voltage is often the mains voltage, for example, a 220V AC voltage. This input AC voltage is converted into a rectified voltage in the rectifier circuit which is usually in the form of suitably arranged diodes, which rectified voltage periodically fluctuates between a peak value and the zero potential. The output voltage of the rectifier circuit therefore shows a high standing wave ratio. To reduce the standing wave ratio, a charging capacitor is connected in parallel to the output of the circuit arrangement, from which charging capacitor the rectified output voltage is tapped. Such a charging capacitor is charged when the rectified voltage on the output of the rectifier circuit rises and is discharged again when the voltage drops. This means that the charging capacitor is used as a buffer which then, when the voltage on the output of the rectifier circuit drops, maintains the voltage for a certain period of time due to the stored amount of charge, until the voltage on the output of the rectifier circuit rises again. The rectified output voltage tapped from this circuit arrangement is consequently smoothed better or less good and usually does not drop below a minimum voltage value. Customarily, such circuit arrangement is used as a so-termed xe2x80x9cintermediate circuitxe2x80x9d. This means that the circuit arrangement is followed by a DC-DC converter which smoothes the rectified output voltage of the intermediate circuit even further and converts the output voltage into the operating voltages necessary for the respective apparatus.
With a voltage supply over the public electricity mains, it must be borne in mind that brief power failures may occur which may extend over several mains half waves. For example, a power failure of 20 ms in a 50 Hz electricity mains stands for 2 half waves being lost. Inevitably, the voltage of the intermediate circuit drops. For such brief power failures not to lead to an interruption of the apparatus, the specifications always require that the apparatus be able to cope with the complete power failure for several mains half waves. However, this requires that the voltage in the intermediate circuit must not drop to zero. The DC-DC converter which follows is furthermore to be able to operate even with the lowest occurring voltage in the intermediate circuit. The design of this converter is then degraded the lower the minimum permitted voltage is in the intermediate circuit if there is a power failure. According to the generally known state of the art the power failure is bridged by a dimensioning the charging capacitor, usually an electrolyte capacitor, correspondingly large. Since this charging capacitor is a component which is stopped by the continuous charging and discharging of heavy loads, more particularly thermal loads, and, in addition, a high dielectric strength (in the European electricity mains normally 400V) is necessary, capacitances of corresponding magnitude are extremely expensive.
It is an object of the present invention to provide a cost-effective alternative to this known state of the art with which the complete power failure of several mains half waves can most reliably be bridged.
This object is achieved by a circuit arrangement as claimed in claim 1.
The use of a stabilizing capacitor connected in parallel to the charging capacitor, which stabilizing capacitor is used as a spare buffer, the charging capacitor itself may be arranged for normal operation i.e. without taking a power failure into account. Therefore, it may be made considerably smaller and thus more cost effective. Since there is provided according to the invention that the voltage value present on the stabilizing capacitor corresponds only to a fraction of a maximum peak voltage present on the charging capacitor and is therefore discharged again in essence only when a voltage present on the charging capacitor drops below the value of the voltage present on the stabilizing capacitor, the stabilizing capacitor needs to have only a correspondingly lower dielectric strength than a charging capacitor. In addition, this circuit provides that the stabilizing capacitor is used only in rare cases, that is, in the case of a power failure. Therefore, this capacitor is not subjected to a heavy load. These assumptions justify the use of a relatively small and cost-effective stabilizing capacitor.
The fraction of the maximum peak voltage present on the charging capacitor, to which voltage the stabilizing capacitor is charged, is defined by the individual components in the circuit arrangement. The discharging of the stabilizing capacitor then in essence commences approximately when the voltage present on the charging capacitor drops below the value of the voltage present on the stabilizing capacitor. The values do not usually exactly correspond, because minor deviations, which are due to power failures at other components necessary for the circuit arrangement, for example, deviations as a result of threshold voltages of diodes etc., are to be taken into account. Instead of one stabilizing capacitor it is also possible to use a plurality of stabilizing capacitors, for example, two.
In an extremely simple and cost-effective example of embodiment two stabilizing capacitors are used which are connected to each other and to the charging capacitor via diodes, so that during a charging operation the stabilizing capacitors work as stabilizing capacitors connected in parallel to the charging capacitor and in series to each other and during a discharging operation work as stabilizing capacitors connected in parallel to the charging capacitor and in parallel to each other. This means that during the charging operation the voltage present on the charging capacitor is divided over the two stabilizing capacitors connected in series and these stabilizing capacitors are therefore charged only to the respective part of the peak voltage of the charging capacitor. Since in the opposite case i.e. during the discharging operation, the two stabilizing capacitors are each individually connected in parallel to the charging capacitor, these stabilizing capacitors are discharged only when the voltage on the charging capacitor drops below the value of the voltage of the stabilizing capacitors. This is usually only the case when there is a power failure.
Preferably, two stabilizing capacitors are used which have about the same capacitance. The two stabilizing capacitors then only need to have half the dielectric strength of the charging capacitor.
In the circuit arrangement according to the invention an arbitrary rectifier i.e. both a one-way and a two-way rectifier and also an intermediate or a bridge circuit may be used as a rectifier circuit. Preferably a diode bridge circuit is used, because it can be connected directly to the mains input voltage without a transformer and is thus suitable for building switched-mode power supplies.